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  TSMC commence la production en volume en 40nm

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TSMC commence la production en volume en 40nm

Posté le 17-11-2008 à 13:57:33  

Je vous retransmets un mail reçu à l’instant d’Andrew Shephard de TSMC :
De : Andrew Shephard
Envoyé : lundi 17 novembre 2008 13:50
À : moi
Objet : Re: Fuzilla say : Nvidia has hoped to have its 40nm chips earlier but due to some delays caused by TSMC
Importance : Haute
This may be interesting, see quote from Nvidia.
Also see this from a US guy who got a pre-brief...  http://www.eetimes.com/news/semi/s [...] 139&pgno=1
Best regards
Release will be live in a few minutes a more generic 'business' version will be on PR Newswire.
Press release follows:
TSMC ramps most advanced available process technology to volume production
Foundry’s first 40 nanometer (nm) process lowers costs and power for high-performance and wireless devices to innovate out of the downturn
Hsin-chu, Taiwan, November 17, 2008 - TSMC (TSE: 2330, NYSE: TSM) has announced volume production of the foundry segment’s only 40nm semiconductor manufacturing process with the successful ramp of its 40nm General Purpose (G) and Low Power (LP) versions.  A comprehensive design infrastructure including library, IP, design flow, engineering service, and monthly CyberShuttleTM prototyping vehicles is also ready for these two processes.
The 40nm process is one of the semiconductor industry’s most advanced manufacturing process technology.  TSMC’s 40nm G and LP processes were formally announced in March as part of the company’s advanced technology offering. The 40G process targets performance-driven applications including CPU, GPU (graphic processing units), game consoles, networking, FPGA, hard disc drive, and other devices.  The 40LP process targets low power applications including cellular baseband, application processors, portable consumer and wireless connectivity devices.
"We view 40nm as an important process node for the cost-effective development of graphics chips and other devices, especially in 2009. This is another example of a long and successful history of AMD and TSMC ramping leading edge processes," said Rick Bergman, Senior Vice-President & General Manager, AMD Graphics Products Group.
“Today designers are faced with the challenge of increasing the functionality of their product while not increasing power consumption. By rolling out the industry’s most advanced programmable logic devices at 40-nm, we are enabling designers to quickly achieve new levels of integration and innovation, while staying within their power budgets,” said Bill Hata, Altera senior vice president of Worldwide Operations and Engineering.  
"High-performance GPUs are only continuing to grow in importance for a
variety of industries," said Debora Shoquist, NVIDIA senior vice president of Operations.  "The advantages that TSMC's 40nm G process provides to designing a GPU will allow us to continue pushing the limits of what’s currently possible.”
“While timed to respond to the technical requirements of our broad customer base, the two processes are clearly the right manufacturing processes at the right time and can help the semiconductor industry, and conceivably other portions of the global economy, to innovate out of the current downturn,” said Jason Chen, Vice President, Worldwide Sales & Marketing, TSMC.
TSMC’s 40G and 40LP processes passed process qualification, reaching “first wafers out” status as planned and completed product qualification in October when first customer wafers entered production. As with every TSMC process node, the 40G and 40LP processes offer a full range of mixed-signal and RF options, along with embedded memory, to support a broad range of analog/RF-intensive and memory-rich applications.  
“Once again we have continued TSMC’s long-standing record of delivering commercially available processes exactly when we said we would and way ahead of competitors,” said Dr. Mark Liu, senior vice president, Advanced Technology Business, TSMC.
Multiple customers at 40nm have adopted Reference Flow 9.0, a production-proven design infrastructure that allows designers to take full advantage of 40G and 40LP processes. TSMC’s Reference Flow includes a number of innovative power reduction techniques and tools that allow designers considering 45nm design rules to transparently target their designs to 40nm processes without explicitly dealing with a multitude of scaling factors. Reference Flow also facilitates enhanced timing, statistical design and design for manufacturing (DFM).            
TSMC's 40G and 40LP processes offer designers up to a 2.35 times raw gate density improvement over the 65nm node. The 40G process is up to 30% faster than TSMC’s 65nm GP process at the same leakage, or up to 70% lower leakage at the same speed.  In addition, it provides up to 45% lower active power than the 65GP process.  The 40LP process provides up to 46% lower leakage and up to 50% lower active power than TSMC’s 65LP at the same speed. It also features the smallest SRAM cell size, 0.242um2, and macro size in production today.
About TSMC
TSMC is the world’s largest dedicated semiconductor foundry, providing the industry’s leading process technology and the foundry’s largest portfolio of process-proven libraries, IP, design tools and reference flows. The Company’s total managed capacity in 2008 is to exceed nine million (8-inch equivalent) wafers, including capacity from two advanced 12-inch - GIGAFABs ™, four eight-inch fabs, one six-inch fab, as well as TSMC’s wholly owned subsidiaries, WaferTech and TSMC (Shanghai), and its joint venture fab, SSMC. TSMC is the first foundry to provide 40nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please see http://www.tsmc.com.

Posté le 17-11-2008 à 13:57:33  

Posté le 23-02-2009 à 15:41:28  

Je ne critique pas le coté enthousiaste de la news, mais concrètement, quand est qu' on verra les GPU a 40nm? La toute dernière GPU de chez NVDIA, la GTX 295 est encore a 55 nm et c'est vendu avec une foultitude  de Banzaï.  
Autant dire que quand le 40nm sera là, je m'enfonce de joie un 88 Flak dans l'oreille.

Message édité par murgen le 23-02-2009 à 15:45:35

Le bruit ne fait pas de bien et le bien ne fait pas de bruit
Posté le 23-02-2009 à 15:52:02  

il y a des problèmes avec le 40nm et Andrew m'a répondu le 12 Février à ce sujet et me dit ne pas en connaitre la raison (mais bien sûr) ...
From: Andrew Shephard  
To: david
Cc: TSMC team  
Sent: Tuesday, February 10, 2009 4:15 PM
Subject: Re: 40nm problem
Hi David,
Yes I've seen the stories.
At the moment I don't have more details but I will be on a call tomorrow night which may tell me more - 40nm status is already on the agenda for the call and I'll be happy to let you know what I find.
All the best
On 10 Feb 2009, at 14:42, david wrote:
Hello Andrew
I contact you about article in theinquirer and fudzilla (TSMC's 40nm problem revealed) delays all 40nm ATI/Nvidia performance GPU.
Have you more information about these problem ? Do you know how many time TSMC need to resolve these problem ?
Do you know if theses problem with the 40nm will delay the development of the new 32 / 28nm process ?
Best regards
Puis :
----- Original Message -----  
From: Andrew Shephard  
To: david
Sent: Thursday, February 12, 2009 6:29 PM
Subject: Re: 40nm problem
I've checked - nothing new I'm afraid.  
As soon as we hear more I will let you know.
Best regards

Message édité par super_newbie_pro le 23-02-2009 à 15:53:53
Posté le 25-02-2009 à 08:33:13  

32 ou 28 nm : hoho. Les puces à ce format font faire paraître les GTX 295 comme des hochets pour bambins. Mais encore toujours aucune date. On patientera puisqu'il le faut.

Le bruit ne fait pas de bien et le bien ne fait pas de bruit
Posté le 26-04-2009 à 15:25:31  

TSMC sur le 22nm :
SAN JOSE, Calif. -- Amid one of the toughest periods in its illustrious history, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) remains cautiously optimistic about the IC industry and vowed that it will continue to invest in R&D despite the downturn.  
TSMC (Hsinchu, Taiwan) plans to hire more engineers. The world's largest foundry provider also reiterated plans to equip and ramp up its 40-nm fab lines this year. It is readying new and separate 3-D and CMOS image sensor technologies. And it is also planning to move the IC-equipment in its R&D fab for the 22-nm node.  
Rick Tsai, president and chief executive of TSMC, reiterated industry reports that the silicon foundry giant is seeing new order activity, but he also warned that there are still challenges ahead in the market.  
Among those challenges include the overall economy, product demand and margin pressures. ''This recession is bad,'' Tsai said at TSMC's Technology Symposium here. ''This is a difficult time for all of us.''  
Indeed, it has been a humbling time for TSMC, which has seen wild growth over the years. After strong growth in the first three quarters of 2008, TSMC's business fell off the cliff in the fourth quarter of last year. In terms of an aggregate sales decline in Q4 of 2008 and projected Q1 of 2009, TSMC's revenues are projected to fall by some 60 percent, Tsai said.  
As a result, the company is expected to report a loss in Q1. It also recently cut about 200 jobs, implemented furloughs and slowed its wafer starts.  
Now, there are some positive signs for the company and the overall industry. Inventories are low. Activity in China is picking up. ''We are seeing what we call rush orders,'' Tsai said.  
Still, the overall IC market is expected to fall in 2009. ''We will see a dip in 2009,'' he said. ''We will see moderate growth in 2010.''  
Nonetheless, TSMC plans to innovate and invest its way out of the downturn, he vowed. Here are some of the company's plans:  
Invest or bust
1. Now, the company has about 1,200 R&D process engineers. Going forward, it wants to hire 30 percent more R&D engineers.  
2. Separately, TSMC has 600 engineers that are focused on IC design issues. Going forward, it wants to hire 15 percent more in this arena.  
3. In May, Intel Corp. said it will port unspecified Atom processor cores to TSMC's technology platform including processes, IP, libraries and design flows under the terms of an agreement between the two companies.  
4. Seeking to accelerate the product development process, TSMC this week rolled out a one-two punch in the arena: It has unveiled a mixed-signal/RF design kit as well as a foundry-specific integrated sign-off flow.  
5. The company this week rolled out a trio of of ''platforms.'' Based on third-party IP and TSMC's libraries, the first ''platforms'' are geared for RFID, smart-card and solid-state drive (SSDs) applications.  
6. TSMC is developing a new CMOS image sensor process for 2-, 5-, and 8-megapixel designs. It has a new 0.11-micron process.  
7. TSMC plans to have its 3-D efforts in place. By June, it will ready its 300-mm fab for thru-hole-silicon (TSV) applications.  
8. TSMC is moving forward with the phase 4 part of its Fab 12 plant, which is based in Hsinchu. As previously reported, the company plans to equip the fab for use in its recently-announced 40-nm process.  
9. In Fab 12, it plans to move the R&D equipment for its 22-nm node, which is under development. Fab 12 also serves as an R&D center.  
At present, the company is ramping up its 40-nm process. It is also on track with its latest 28-nm process, said Jack Sun, vice president of R&D at TSMC. Based on high-k and metal gates, the recently-introduced 28-nm process is due out in the first part of 2010. TSMC has not disclosed the exact details of its high-k technology.  
In comparison, IBM Corp.'s ''fab club'' said that its high-k and metal gate technology for 32-nm is still on track and slated for the second half of this year. The group also recently rolled out its 28-nm process. The group's 28-nm, low-power technology evaluation kit was made available in December of 2008 to early access clients, followed by release in March of 2009 of an evaluation kit for open access to the general marketplace. Early ''risk production'' for the 28-nm technology is anticipated in the second half of 2010.  
Meanwhile, TSMC is currently looking at the various options for 22-nm. Like 28-nm, the company's 22-nm process will be based on 193-nm immersion lithography, copper interconnects, ultra-low k and its second-generation high-k technology. It dropped hints that its high-k would have an equivalent oxide thickness (EOT) of 0.7-nm.  
TSMC plans to roll out its 22-nm process ''two years after 32-nm,'' Sun said. TSMC is set to ship 32-nm by the end of 2009. Its 28-nm process is due out in the first part of 2010.  
source : http://www.eetimes.com/news/latest [...] =216900470

Posté le 11-05-2009 à 23:58:12  

Ca chauffe pour TSMC... :-/
Ils risquent de morfler sérieusement commercialement parlant et ça va s'en ressentir sur leur bilan et pas qu'un peu...  
Traduction (articles en anglais ci-dessous) approximative pour les non anglophones :

Citation :

il ressemble que TSMC ait de très sérieux ennuis avec deux ses principaux clients ATI et Nvidia...(...) Selon nos informations ces derniers sont très déçus de TSMC. Cependant le tableau pourrait être bien plus sombre que ce qu'on pourrait imaginer ! (...)
Nos sources proches d'AMD et de nVidia nous ont indiqué que l'enthousiasme pour Windows 7 est « la plus grande occasion jusqu'ici » et que TSMC doit mettre au point ses rendements et que la production de volumes importants doit se produire vers la fin mai, sinon les ventes pour la rentrée scolaire seront compromises. Comprenez donc qu'AMD/ATI et nVidia ne restent pas sans rien faire et exigent que TSMC améliore sa production. Les ingénieurs aux deux compagnies travaillent avec TSMC afin de corriger et d'améliorer le processus, et parfois, prenent même la tête dans le développement de processus de fabrication.  :ouch:  :ouch: Un des meilleurs exemples porte sur « la haute performance du 55nm », qui était un processus de gravure fortement modifié par AMD avec le half-node. (sic ! :ouch: )
Depuis son annonce il y a un an, le processus de gravure 40nm a relevé de sérieux défis, et les compagnies expriment leur doute concernant le « 40nm », puisque certains clients tels que le FPGA-fabricant Altera travailleraient avec TSMC sur un procédé en 45nm, mais furent étonné d'entendre que TSMC les considère comme ses princpaux clients pour le 40nm !  :ouch: mdrrr... Ca c'est un exemple de communication-marketing made in TSMC qui se retourne dans leur gueule violemment ^^
nVidia est placé pour lancer trois produits 40nm autour du calendrier de Computex, et ces trois produits [GT215, GT216, GT218] sont un prémisse de la bête en 40nm appelée architecture NV70-G300-GT300.
Si TSMC manque à ses engagements donnés, la fonderie pourrait perdre ses deux principaux clients en 2010 au profit de The GlobalFoundries et à ses process en 32 et 28nm + SOI. Selon une de nos sources, une de ces deux compagnies travaille sérieusement à la technologie de SOI [Silicon-On-Insulator] pour ses prochaines pièces de SOC et de GPU. La réponse pourrait vous étonner.

"If TSMC fails to deliver, the foundry might lose both of its key customers in 2010"
"nVidia is set to launch three 40nm parts around Computex timeframe, and those three products [GT212, GT216, GT218] are a prequel into the 40nm beast called NV70-G300-GT300 architecture."
5/11/2009 by: Theo Valich
Hot on the heels of stories from last week, it looks like TSMC [TSM] is in serious trouble with two of its key customers. According to information we have, both ATI [AMD] and nVidia [NVDA] are "seriously disappointed" at Taiwanese Semiconductor Manufacturing Company. I had couple of conversations this weekend with people that are in the know on the subject, and learned that the situation is looking gloomier than first news lead us to believe. Leaking issues are a standard manufacturing problem that can happen to anyone, including Intel [does anyone remembers Prescott e.g. PressHot].
Problem that both ATI and nVidia have is the fact that in case of CPU manufacturing, AMD and Intel will have it "easy". Processors will almost always be configured in a vertical position, so the thermal load will go to upper part of the package. With GPUs, they're almost always positioned at the worst possible spot - facing downwards, with any thermal load pushing not just the chip packaging, but the PCB [Printed Circuit Board] as well. Chip packaging usually does not fail [nVidia's GeForce 8600 series is the only case to date], but PCBs such as graphics cards or motherboards - do fail.
Our sources close to the heart of both AMD and nVidia told us that Windows 7 momentum is "the largest opportunity to date" [referring to graphics chips sales], and that TSMC has to ramp up the yields and that serious volume production has to happen by the end of May, or the sales for Back-to-School are gone. Bear in mind that AMD/ATI & nVidia aren't sitting idle and telling TSMC to improve. Engineers at both companies are working with TSMC in order to tweak up the process, and sometimes, even take the lead in manufacturing process development. Good example of that was "55nm high performance", which was a heavily modified half-node process where AMD lead the development.
Since its announcement a year ago, 40nm half-node process faced serious challenges, and tooling companies are expressing their doubt at the "40nm" part, since some customers such as FPGA-maker Altera [ALTR] were told that they're working with TSMC on a 45nm node, and then end up surprised to hear that TSMC is considering them as "a leading 40nm customer".
nVidia is set to launch three 40nm parts around Computex timeframe, and those three products [GT215, GT216, GT218] are a prequel into the 40nm beast called NV70-G300-GT300 architecture.
If TSMC fails to deliver, the foundry might lose both of its key customers in 2010 to GlobalFoundries and their 32nm and 28nm bulk and SOI processes. According to one of our sources, one of these two companies is seriously working on SOI [Silicon-On-Insulator] technology for its upcoming SOC and GPU parts. The answer might surprise you. source : http://www.brightsideofnews.com/ne [...] gone!.aspx

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